Test generation for highly sequential circuits

Volumn , Issue , 1989, Pages 362-365

  Ghosh, Abhijit ^a   Devadas, Srinivas ^a   Newton, A Richard ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CIRCUITS, FLIP FLOP; INTEGRATED CIRCUIT TESTING;

CUBE INTERSECTION; FAULT-FREE STATE JUSTIFICATION; NONSCAN SYNCHRONOUS SEQUENTIAL CIRCUITS; STATE DIFFERENTIATION; STUCK-AT FAULTS; TEST GENERATION;

LOGIC CIRCUITS, SEQUENTIAL;

EID: 0024902645     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)