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Volumn , Issue , 1989, Pages 362-365
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Test generation for highly sequential circuits
a
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Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRONIC CIRCUITS, FLIP FLOP;
INTEGRATED CIRCUIT TESTING;
CUBE INTERSECTION;
FAULT-FREE STATE JUSTIFICATION;
NONSCAN SYNCHRONOUS SEQUENTIAL CIRCUITS;
STATE DIFFERENTIATION;
STUCK-AT FAULTS;
TEST GENERATION;
LOGIC CIRCUITS, SEQUENTIAL;
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EID: 0024902645
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (21)
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References (16)
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