Heavy ion induced snapback in CMOS devices

IEEE Transactions on Nuclear Science

Volumn 36, Issue 6, 1989, Pages 2367-2374

  Koga, R ^a   Kolasinski, W A ^a  

^a AEROSPACE CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARGON; ION BEAMS; KRYPTON; NEON; NITROGEN;

CMOS INTEGRATED CIRCUITS; HEAVY IONS; SINGLE EVENT SNAPBACKS;

INTEGRATED CIRCUITS;

EID: 0024890333     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/23.45450     Document Type: Article

References (6)

1. E. Sun, J. Moll, J. Berger, and B. Adlers, “Breakdown mechanism in short channel MOS transistors,” in IEDM Tech. Dig., pp. 478–482, 1978.
2. T. Toyabe, K. Yamaguchi, S. Asai, and M. Mock, “A numerical model of avalanche breakdown in MOSFET's,” IEEE Trans. Elect. Dev., ED-25, pp. 825–831, 1978.
3. A. Ochoa Jr., F.W. Sexton, T.F. Wrobel, G.L. Hash, and R.J. Sokel, “Snap-back: a stable regenerative breakdown mode of MOS devices,” IEEE Trans. Nucl. Sci., NS-30, pp. 4127–4130, 1983.
4. B.A. Beitman, “n-Channel MOSFET breakdown characteristics and modeling for p-well technologies,” IEEE Trans. Elect. Dev., ED-35, pp. 1934–1941, 1988.
5. R. Koga, W.A. Kolasinski, and S. Imamoto, “Heavy ion induced upsets in semiconductor devices,” IEEE Trans. Nucl. Sci., NS-32, pp. 159–162, 1985.
6. W.A. Kolasinski, R. Koga, E. Schnauss, and J. Duffey, “The effect of elevated temperature on latchup and bit errors in CMOS devices,” IEEE Trans. Nucl. Sci., NS-33, pp. 1605–1609, 1986.