Guiding principle for BiCMOS scaling in ULSIs

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1989, Pages 53-54

  Shukuri, S ^a   Watanabe, A ^a   Izawa, R ^a   Nagano, T ^a   Takeda, E ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTOR DEVICES, MOS;

BICMOS; GOLD (GATE-DRAIN OVERLAPPED LDD) DEVICE; LDD (LIGHTLY DOPED DRAIN) DEVICE; MOS JUNCTION CAPACITANCE; ULSI;

INTEGRATED CIRCUITS, VLSI;

EID: 0024886383     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)