A 200-MHz CMOS Phase-Locked Loop with Dual Phase Detectors

IEEE Journal of Solid-State Circuits

Volumn 24, Issue 6, 1989, Pages 1560-1568

  Ware, Kurt M ^a,b   Lee, Hae Seung ^a   Sodini, Charles G ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DEMODULATORS; OSCILLATORS;

CMOS INTEGRATED CIRCUITS; CMOS PHASE LOCKED LOOPS; DUAL PHASE DETECTORS; MULTIPLYING PHASE DETECTOR; PHASE-FREQUENCY DETECTOR;

PHASE LOCKED LOOPS;

EID: 0024879786     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.44991     Document Type: Article

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