68 ns 4 Mbit CMOS EPROM with high noise immunity design

Volumn , Issue , 1989, Pages 37-38

  Imamiya, Kenichi ^a   Miyamoto, Junichi ^a   Ohtsuka, Nobuaki ^a   Atsumi, Shigeru ^a   Sako, Toshiyuki ^a   Muroya, Yukinori ^a   Mori, Seiichi ^a   Yoshikawa, Kuniyoshi ^a   Tanaka, Sumio ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, VLSI--NOISE, SPURIOUS SIGNAL; SEMICONDUCTOR DEVICES, MOS;

CMOS EPROMS; CMOS INTEGRATED CIRCUITS; DIGEST OF PAPER; ELECTRICALLY PROGRAMMABLE ROMS; NOISE IMMUNITY; READ ONLY MEMORIES;

DATA STORAGE, DIGITAL;

EID: 0024878813     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)