The Transduction Method-Design of Logic Networks Based on Permissible Functions

IEEE Transactions on Computers

Volumn 38, Issue 10, 1989, Pages 1404-1424

  Muroga, Saburo ^a   Kambayashi, Yahiko ^a   Lai, Hung Chi ^a,b   Culliney, Jay Niel ^a,c  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b FUJITSU LABORATORIES OF AMERICA   (United States)

^c AEROSPACE CORPORATION   (United States)

Author keywords

Error compensation; logic design; logic network; network reduction; network transformation; nor gate; permissible function; transduction method

Indexed keywords

LOGIC DESIGN--COMPUTER AIDS; LOGIC DEVICES--GATES;

ERROR COMPENSATION; LOGIC NETWORKS; NETWORK TRANSFORMATION; NOR GATE; PERMISSIBLE FUNCTIONS;

LOGIC CIRCUITS;

EID: 0024753283     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.35836     Document Type: Article

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