An Experimental 16-Mbit DRAM with Reduced Peak-Current Noise

IEEE Journal of Solid-State Circuits

Volumn 24, Issue 5, 1989, Pages 1191-1197

  Chin, Daeje ^a   Kim, Changhyun ^a   Choi, Yunho ^a   Min, Dong Sun ^a   Hwang, Hong Sun ^a   Cho, Sooin ^a   Chung, Tae Young ^a   Shin, Yunseung ^a   Suh, Kwangpyuk ^a   Park, Yong E ^a   Choi, Hoon ^a   Park, Chan J ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, SEMICONDUCTOR--NOISE, SPURIOUS SIGNAL;

16-MBIT DRAM; BANDGAP REFERENCE CIRCUIT; CMOS MEMORY CIRCUITS; INTERNAL VOLTAGE CONVERTER; PEAK CURRENT NOISE;

DATA STORAGE, DIGITAL;

EID: 0024752340     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1989.572578     Document Type: Article

References (16)

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