New DRAM Noise Generation Under Half-VccPrecharge and its Reduction Using a Transposed Amplifier

IEEE Journal of Solid-State Circuits

Volumn 24, Issue 4, 1989, Pages 889-894

  Aoki, Masakazu ^a   Kawase, Yasushi ^a   Nakagome, Yoshinobu ^a   Horiguchi, Masashi ^a   Kawamoto, Yoshifumi ^a   Itoh, Kiyoo ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, SEMICONDUCTOR--STORAGE DEVICES; SEMICONDUCTOR DEVICES, MOS--NOISE;

DYNAMIC RAM; MEMORY CELL; NOISE GENERATION; RANDOM-ACCESS MEMORIES; TRANSPOSED AMPLIFIER;

DATA STORAGE, DIGITAL;

EID: 0024718443     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.34066     Document Type: Article

References (10)

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9. T. Yoshihara et. al., “A twisted bit line technique for multi-Mb DRAMs,” in ISSCC Dig. Tech. Papers, Feb. 1988, pp. 238–239.
10. S. Ikenega et al., “New DRAM noise generation under half Vcc precharge and its reduction using a transposed amplifier,” in Symp VLSI Circuits Dig. Tech. Papers, Aug. 1988, pp. 79–80.