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Volumn 24, Issue 4, 1989, Pages 969-975

17-bit oversampling D-to-A conversion technology using multistage noise shaping

Author keywords

[No Author keywords available]

Indexed keywords

AUDIO EQUIPMENT--DIGITAL DEVICES; INTEGRATED CIRCUITS, LSI--DESIGN;

EID: 0024716952     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.34079     Document Type: Article
Times cited : (47)

References (15)
  • 1
    • 0020894560 scopus 로고
    • A complete high-speed voltage output 16-bit monolithic DAC
    • J. R. Naylor A complete high-speed voltage output 16-bit monolithic DAC IEEE J. Solid-State Circuits SC-18 729 735 Dec. 1983
    • (1983) IEEE J. Solid-State Circuits , vol.SC-18 , pp. 729-735
    • Naylor, J.R.1
  • 3
    • 0020501280 scopus 로고
    • New linearity error correction technology for A/D and D/A converter LSI
    • Y. Akazawa Y. Matsuya A. Iwata New linearity error correction technology for A/D and D/A converter LSI Japan. J. Appl. Phys. 22 suppl. 22-1 115 119 Jan. 1983
    • (1983) Japan. J. Appl. Phys. , vol.22 , Issue.suppl. 22-1 , pp. 115-119
    • Akazawa, Y.1    Matsuya, Y.2    Iwata, A.3
  • 4
    • 0020767069 scopus 로고
    • Dynamic element matching puts trimless converters on chip
    • R. V. Plassche Dynamic element matching puts trimless converters on chip Electronics 56 12 130 134 16 June 1983
    • (1983) Electronics , vol.56 , Issue.12 , pp. 130-134
    • Plassche, R.V.1
  • 7
    • 0020719830 scopus 로고
    • Design methodology for ΣΔM
    • B. Agrawal K. Shenoi Design methodology for ΣΔM IEEE Trans. Commun. COM-31 360 370 Mar. 1983
    • (1983) IEEE Trans. Commun. , vol.COM-31 , pp. 360-370
    • Agrawal, B.1    Shenoi, K.2
  • 8
    • 0016036290 scopus 로고
    • A use of limit cycle oscillations to obtain robust analog-to-digital converters
    • J. C. Candy A use of limit cycle oscillations to obtain robust analog-to-digital converters IEEE Trans. Commun. COM-22 298 305 Mar. 1974
    • (1974) IEEE Trans. Commun. , vol.COM-22 , pp. 298-305
    • Candy, J.C.1
  • 9
    • 0022907085 scopus 로고
    • A 12-bit sigma-delta analog-to-digital converter with 15-MHz clock rate
    • P. Koch A 12-bit sigma-delta analog-to-digital converter with 15-MHz clock rate IEEE J. Solid-State Circuits SC-21 1003 1009 Dec. 1986
    • (1986) IEEE J. Solid-State Circuits , vol.SC-21 , pp. 1003-1009
    • Koch, P.1
  • 11
    • 0022880319 scopus 로고
    • VLSI A-to-D and D-to-A converters with multi-stage noise shaping modulators
    • K. Uchimura T. Hayashi T. Kimura A. Iwata VLSI A-to-D and D-to-A converters with multi-stage noise shaping modulators Proc. ICASSP 1545 1548 Proc. ICASSP 1986-Apr.
    • (1986) , pp. 1545-1548
    • Uchimura, K.1    Hayashi, T.2    Kimura, T.3    Iwata, A.4
  • 12
    • 0001058202 scopus 로고
    • A multi-stage delta-sigma modulator without double integration loop
    • T. Hayashi Y. Inabe K. Uchimura T. Kimura A multi-stage delta-sigma modulator without double integration loop ISSCC Dig. Tech. Papers ISSCC Dig. Tech. Papers 1986-Feb.
    • (1986)
    • Hayashi, T.1    Inabe, Y.2    Uchimura, K.3    Kimura, T.4
  • 13
    • 33847126300 scopus 로고
    • A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping
    • Y. Matsuya A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping IEEE J. Solid-State Circuits SC-22 921 929 Dec. 1987
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 921-929
    • Matsuya, Y.1
  • 14
    • 85142996433 scopus 로고
    • A 17-bit oversampling D/A conversion technology using multi-stage noise shaping
    • Y. Matsuya K. Uchimura A. Iwata A 17-bit oversampling D/A conversion technology using multi-stage noise shaping Dig. Tech. Papers Symp. VLSI Circuits Dig. Tech. Papers Symp. VLSI Circuits 1988-Aug.
    • (1988)
    • Matsuya, Y.1    Uchimura, K.2    Iwata, A.3
  • 15
    • 0022733138 scopus 로고
    • A CMOS stereo 16-bit D/A converter for digital audio
    • P. A. Naus A CMOS stereo 16-bit D/A converter for digital audio IEEE J. Solid-State Circuits SC-22 390 395 June 1987
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 390-395
    • Naus, P.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.