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Volumn 36, Issue 8, 1989, Pages 1101-1105

A Digital Controlled Oscillator Based on Controlled Phase Shifting

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CONTROL, ELECTRIC VARIABLES--FREQUENCY; LOGIC CIRCUITS, TRANSISTOR TRANSISTOR; PHASE LOCKED LOOPS;

EID: 0024715263     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/31.192420     Document Type: Article
Times cited : (7)

References (12)
  • 1
    • 0016472635 scopus 로고
    • phaselocked loops
    • Feb.
    • S. C. Gupta, “phaselocked loops,” Proc. IEEE, vol. 63, pp. 291-306, Feb. 1975.
    • (1975) Proc. IEEE , vol.63 , pp. 291-306
    • Gupta, S.C.1
  • 5
    • 0019558620 scopus 로고
    • A survey of digital P.L.L.
    • Apr.
    • W. C. Lindsey and C. M. Chie, “A survey of digital P.L.L.,” Proc. IEEE, vol. 69, pp. 410-431, Apr. 1981.
    • (1981) Proc. IEEE , vol.69 , pp. 410-431
    • Lindsey, W.C.1    Chie, C.M.2
  • 6
    • 0019559041 scopus 로고
    • A digital phase locked loop for generating frequency discriminating codes and frequency multiplication
    • Apr.
    • A. R. Saha and B. C. Mazumder, “A digital phase locked loop for generating frequency discriminating codes and frequency multiplication,” Proc. IEEE, vol. 69, pp. 472-473, Apr. 1981.
    • (1981) Proc. IEEE , vol.69 , pp. 472-473
    • Saha, A.R.1    Mazumder, B.C.2
  • 7
    • 0020769796 scopus 로고
    • A versatile CMOS rate multiplier/variable divider
    • June
    • R. C. Den Dulk and J. J. Stuyt, “A versatile CMOS rate multiplier/variable divider,” IEEE J. Solid-Stale Circuits, vol. SC-18, June 1983.
    • (1983) IEEE J. Solid-Stale Circuits , vol.SC-18
    • Den Dulk, R.C.1    Stuyt, J.J.2
  • 8
    • 0017909176 scopus 로고
    • Performance of a binary quantized all digital phaselocked loop with a new class of sequential filter
    • Jan.
    • H. Yamamoto and S. Mori, “Performance of a binary quantized all digital phaselocked loop with a new class of sequential filter,” IEEE Trans. Commun., vol. COM-26, pp. 35-45, Jan. 1978.
    • (1978) IEEE Trans. Commun. , vol.COM-26 , pp. 35-45
    • Yamamoto, H.1    Mori, S.2
  • 9
    • 0020737165 scopus 로고
    • Analysis of digital bit synchronizer
    • Apr.
    • A. E. Payzin, “Analysis of digital bit synchronizer,” IEEE Trans. Commun., vol. COM-31, pp. 554-560, Apr. 1983.
    • (1983) IEEE Trans. Commun. , vol.COM-31 , pp. 554-560
    • Payzin, A.E.1
  • 10
    • 0021623437 scopus 로고
    • Performance improvement of a binary quantized all-digital phaselocked loop with a new aided-acquisition technique
    • Dec.
    • J. P. Sandoz and W. Steenaart, “Performance improvement of a binary quantized all-digital phaselocked loop with a new aided-acquisition technique,” IEEE Trans. Commun., vol. COM-32, pp. 1269-1276, Dec. 1984.
    • (1984) IEEE Trans. Commun. , vol.COM-32 , pp. 1269-1276
    • Sandoz, J.P.1    Steenaart, W.2
  • 11
    • 0022119751 scopus 로고
    • A comparison of Si MOSFET and GaAs MESFET enhancement/depletion logic performance
    • Sept.
    • G. W. Taylor and R. J. Bayruns, “A comparison of Si MOSFET and GaAs MESFET enhancement/depletion logic performance,” IEEE Trans. Electron Devices, vol. ED-32, pp. 1633-1641, Sept. 1985.
    • (1985) IEEE Trans. Electron Devices , vol.ED-32 , pp. 1633-1641
    • Taylor, G.W.1    Bayruns, R.J.2
  • 12
    • 0003915801 scopus 로고
    • SPICE2: A computer program to simulate semiconductor circuits
    • Univ. California, Berkeley, ERL Memo ERL-M520, May
    • L. W. Nagel, “SPICE2: A computer program to simulate semiconductor circuits,” Univ. California, Berkeley, ERL Memo ERL-M520, May 1975.
    • (1975)
    • Nagel, L.W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.