Algorithms for Hardware Allocation in Data Path Synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 8, Issue 7, 1989, Pages 768-781

  Dev Adas, Srinivas ^a   Newton, A Richard ^b  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE--MICROPROGRAMMING; OPTIMIZATION; SYSTEMS SCIENCE AND CYBERNETICS--HEURISTIC PROGRAMMING;

ALLOCATION PROBLEM; DATA PATH SYNTHESIS; HARDWARE ALLOCATION ALGORITHMS; INTERCONNECT ALLOCATION; PIPELINED DATA PATHS; SIMULATED ANNEALING;

COMPUTERS, DIGITAL;

EID: 0024706222     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.31534     Document Type: Article

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