Using Statecharts for Hardware Description and Synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 8, Issue 7, 1989, Pages 798-807

  Drusinsky, Doron ^a   Harel, David ^a  

^a WEIZMANN INSTITUTE OF SCIENCE   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY--FINITE AUTOMATA; INTEGRATED CIRCUITS, VLSI--COMPUTER AIDED DESIGN; SYSTEMS SCIENCE AND CYBERNETICS--HIERARCHICAL SYSTEMS;

FLEXIBLE CONCURRENCY; HARDWARE DESCRIPTION/SYNTHESIS; HIERARCHICAL DECOMPOSITION; MEALY/MOORE MACHINE; MULTILEVEL TIMING SPECIFICATIONS; STATECHARTS METHOD;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 0024705766     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.31537     Document Type: Article

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