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Volumn 36, Issue 5, 1989, Pages 938-942

Measurement and Modeling of the Sidewall Threshold Voltage of Mesa-Isolated SOI MOSFET's

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE SHARING; SIDEWALL THRESHOLD VOLTAGE; SILICON ON INSULATOR MOSFET; THRESHOLD VOLTAGE;

EID: 0024663024     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.299676     Document Type: Article
Times cited : (27)

References (11)
  • 1
    • 0020830319 scopus 로고
    • Threshold voltage of thin-film sili- con-on-insulator (SOI) MOSFET's
    • H.-K. Lim and J. G. Fossum, “Threshold voltage of thin-film sili- con-on-insulator (SOI) MOSFET's,” IEEE Trans. Electron Devices, vol. ED-30, p. 1244, 1983.
    • (1983) IEEE Trans. Electron Devices , vol.ED-30 , pp. 1244
    • Lim, H.K.1    Fossum, J.G.2
  • 3
    • 0024171647 scopus 로고
    • Self-aligned doping of mesa sidewalls for SOI transistors
    • presented at the SOS/SOI Tech. Workshop
    • M. Matloubian, B.-Y. Mao, and G. P. Pollack, “Self-aligned doping of mesa sidewalls for SOI transistors,” presented at the SOS/SOI Tech. Workshop, 1988.
    • (1988)
    • Matloubian, M.1    Mao, B.Y.2    Pollack, G.P.3
  • 4
    • 0020807094 scopus 로고
    • Subthreshold currents in CMOS transistors made on oxygen-implanted silicon
    • D. J. Foster, “Subthreshold currents in CMOS transistors made on oxygen-implanted silicon,” Electron. Lett., vol. 19, p. 684, 1983.
    • (1983) Electron. Lett. , vol.19 , pp. 684
    • Foster, D.J.1
  • 5
    • 84941547053 scopus 로고
    • SOI edge parasitics and their couplings
    • presented at the 44th Annual Device Research Conf.
    • C.-E. Chen, “SOI edge parasitics and their couplings,” presented at the 44th Annual Device Research Conf., 1986.
    • (1986)
    • Chen, C.E.1
  • 6
    • 0023382480 scopus 로고
    • effect of post-oxygen-implant annealing temperature on the channel mobilities of CMOS devices in oxygen-implanted silicon- on-insulator structures
    • ''The
    • B.-Y. Mao, M. Matloubian, C.-E. Chen, R. Sundaresan, and C. Slawinski, ‘'The effect of post-oxygen-implant annealing temperature on the channel mobilities of CMOS devices in oxygen-implanted silicon- on-insulator structures,” IEEE Electron Device Lett., vol. EDL-8, p. 306, 1987.
    • (1987) IEEE Electron Device Lett. , vol.EDL-8 , pp. 306
    • Mao, B.Y.1    Matloubian, M.2    Chen, C.E.3    Sundaresan, R.4    Slawinski, C.5
  • 7
    • 84941547054 scopus 로고
    • 1.25-m buried oxide SOI/CMOS process for 16K/64K SRAM's
    • presented at the 44th Annual Device Research Conf.
    • C.-E. Chen et al., “1.25-m buried oxide SOI/CMOS process for 16K/64K SRAM's,” presented at the 44th Annual Device Research Conf., 1986.
    • (1986)
    • Chen, C.E.1
  • 11
    • 0023648442 scopus 로고
    • CMOS circuits made in thin SIMOX films
    • J. P. Colinge and T. I. Kamins, “CMOS circuits made in thin SIMOX films,” Electron. Lett., vol. 23, p. 1162, 1987.
    • (1987) Electron. Lett. , vol.23 , pp. 1162
    • Colinge, J.P.1    Kamins, T.I.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.