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Volumn 24, Issue 2, 1989, Pages 409-416

Integration of Algorithmic VLSI Synthesis with Testability Incorporation

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING--ALGORITHMS; ELECTRIC FILTERS; INTEGRATED CIRCUIT TESTING;

EID: 0024647420     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.18602     Document Type: Article
Times cited : (12)

References (22)
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  • 4
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  • 5
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    • Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptions
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  • 7
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    • Design for testability A survey
    • Jan
    • T. W. Williams and K. P. Parker, “Design for testability A survey,” Proc. IEEE, vol. 71, pp. 98–112. Jan. 1983.
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    • Williams, T.W.1    Parker, K.P.2
  • 8
    • 0022665471 scopus 로고
    • An automatic DFT system for the silc silicon compiler
    • Feb
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  • 9
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    • Abadir, M.S.1    Breuer, M.A.2
  • 10
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    • A knowledge-based system for selecting test methodologies
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    • Zhu, X.1    Breuer, M.A.2
  • 12
    • 0022873574 scopus 로고
    • A perspective on CMOS technology trends
    • Dec
    • W. C. Holton and R. K. Cavin, “A perspective on CMOS technology trends,” Proc., IEEE, vol. 74, pp. 1646–1668. Dec. 1986.
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    • Holton, W.C.1    Cavin, R.K.2
  • 14
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    • Scheduling and allocation for behavioral synthesis of pipelined ASICs
    • Manitoba, Canada Oct
    • P. G. Paulin and J. P. Knight, “Scheduling and allocation for behavioral synthesis of pipelined ASICs,” in Proc. Canadian Conf. VLSI (Manitoba, Canada), Oct 1987, pp. 229–234.
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  • 15
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    • Flamel: A high-level hardware compiler
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    • H. Trickey, “Flamel: A high-level hardware compiler,” IEEE Trans. Computer-Aided Des., vol. CAD-6, pp. 259–269. Mar. 1987.
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    • Trickey, H.1
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    • A knowledge based system for selecting a test methodology for a PLA
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  • 22


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.