The Architectures and Design of a 20-MHz RealTime DSP Chip Set

IEEE Journal of Solid-State Circuits

Volumn 24, Issue 2, 1989, Pages 338-348

  Ruetz, Peter A ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FILTERS; INTEGRATED CIRCUIT MANUFACTURE;

BINARY FILTER; DSP CHIP; FIR FILTERS; TEMPLATE MATCHER; VIDEO LINE DELAY;

DATA PROCESSING;

EID: 0024646119     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.18594     Document Type: Article

References (14)

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