Synthesizing Circuits From Behavioral Descriptions

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 8, Issue 2, 1989, Pages 171-180

  Camposano, Raul ^a   Rosenstiel, Wolfgang ^a  

^a UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY--FORMAL LANGUAGES; MATHEMATICAL TECHNIQUES--GRAPH THEORY;

ASIC DESIGN; BEHAVIORAL DESCRIPTIONS; DATA FLOW GRAPHS; DIGITAL SYSTEM SPECIFICATION LANGUAGE (DSL);

INTEGRATED CIRCUITS, DIGITAL;

EID: 0024612040     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.21835     Document Type: Article

References (37)

1. D. Gajski and R. Kuhn, “Guest Editor's Introduction: New VLSI Tools,” Computer, vol. 16, no. 12, pp. 11–14, Dec. 1983.
2. R. Camposano, A. Kunzmann, and W. Rosenstiel, “Automatic data path synthesis from DSL specifications,” in IEEE Int. Conf. on Computer Design, pp. 630–635, Oct. 1984.
3. R.A. Walker and D.E. Thomas, “A model of design representation and synthesis,” in 22nd Design Automation Conf., pp. 453–459, June 1985.
4. S.W. Director, A.C. Parker, D.P. Siewiorek, and D.E. Thomas. “A design methodology and computer aids for digital VLSI systems,” IEEE Trans. Circuits Syst., vol. CAS-28, pp. 634–645, July 1981.
5. E.F. Girczyc, R. Buhr, and J.P. Knight. “Applicability of a subset of ADA as an algorithmic hardware description language for graph-based hardware compilation,” IEEE Trans. Computer-Aided Design, vol. CAD-4, pp. 134–142, Apr. 1985.
6. W. Rosenstiel, “Synthese des Datenflusses digitaler Schaltungen aus formalen Spezifikationen,” Ph.D. dissertation, Fakultaet fuer Informatik, Univ. Karlsruhe, VDI-Verlag, 1984.
7. T.J. Kowalsky and D.E. Thomas, “The VLSI design automation assistant: Prototype system,” in 20th Design Automation Conf, pp. 479–483, June 1983.
8. L.J. Haferand A.C. Parker, “A formal method for the specification, analysis, and design of register-transfer level digital logic,” IEEE Computer-Aided Design, vol. CAD-2, pp. 4–18. Jan. 1983.
9. C-J. Tseng and D.P. Siewiorek, “Automated synthesis of data paths in digital systems,” IEEE Trans. Computer-Aided Design, vol. CAD-5, pp. 379–395, July 1986.
10. R. Camposano, “Synthesis techniques for digital systems design, in 22nd Design Automation Conf., pp. 475–481, June 1985.
11. D.E. Thomas, “Automatic data path synthesis,” in Design Methodologies, Advances in CAD for VLSI, vol. 6, S. Goto, Ed., Amsterdam. The Netherlands: North Holland, 1986.
12. R. Camposano and L. Treff, “STRUDEL-Eine Sprache zur Spezifikation der Struktur digitaler Schaltungen,” Rep. 7/84, Fakultaet fuer Informatik, Univ. Karlsruhe, 1984.
13. R. Camposano and W. Rosenstiel, “A design environment for the synthesis of integrated circuits,” in IIth Symp. Microprocessing and Microprogramming EUROMICRO′85, Brussels. Belgium, pp. 211–215, Sept. 1985.
14. E. Hoerbst, M. Nett, and H. Schwaertzel, VENUS-Entwurf von VLSI-Schaltungen. New York: Springer, 1986.
15. R. Camposano and W. Rosenstiel, “Algorithmische Synthese deter-ministischer (Petri-) Netze aus Ablaufbeschreibungen digitaler systeme,” Rep. 22/80, Fakultaet fuer Informatik, Univ. Karlsruhe, 1980.
16. W. Rosenstiel, “DSL-Eine Sprache zur Spezifikation der Funktion digitaler Systeme: Konzept und Implementierung, “Rep. 9/82, Fakultaet fuer Informatik, Univ. Karlsruhe, 1982.
17. R. Camposano, A. Kunzmann and W. Rosenstiel, “Automatic Data Path Synthesis from Behavioural Level Descriptions in DSL,” in VLSI: Algorithms and Architectures, Edited by P. Bertolazzi and F. Lucio, Eds., Amsterdam, The Netherlands: North Holland, 1985, pp. 233–242.
18. R. Camposano and R. Weber, “DSL-Eine Sprache zur Spezifikation digitaler Schaltungen,” Rep. 24/84, Fakultaet fuer Informatik, Univ. Karlsruhe, 1984.
19. S.D. Johnson, Synthesis of Digital Designs from Recursion equations. Cambridge, MA: MIT Press, 1984.
20. M.R. Barbacci, G.E. Barnes, R.G. Cattell, and D.P. Siewiorek, “The ISPS computer description language,” Rep. CMU-CS-79–137, Dep. of Computer Science, Camegie-Mellon Univ., Pittsburgh, PA, 1979.
21. P. Marwedel, “The MIMOLA design system: Tools for the design of digital processors,” in Proc. 21st Design Automation Conf., pp. 587–593, June 1984.
22. M.C. McFarland, “The VT: A database for automated digital design,” Rep. DRC-01-4–80, Design Research Center, Camegie-Mellon Univ., Pittsburgh, PA, 1978.
23. D. Knapp and A. Parker, “A data structure for VLSI synthesis and verification.' Tech. Rep. DISC 83–6a, Digital Integrated Systems Center. Dept, of EE-Systems, Univ of Southern California. Oct. 1983.
24. R. Camposano and A. Kunzmann, “Considering timing constraints in synthesis from a behavioural description.” in IEEE Int. Conf. on Computer Design ICCD '86, pp. 6–9. Oct. 1986.
25. T. Weber, “Erhoehung der Nebenlaufigkeit in automatisch entwor-fenen digitalen Systemen,” Ph.D. dissertation. Fakultaet fuer Informatik, Univ. Karlsruhe. 1986.
26. J.A. Darringer and W.H. Joyner, “A new look at logik synthesis,” in 17th Design Automation Conf., pp. 543–549. Minneapolis. MN, 1980. -
27. W. Rosenstiel. Optimizations in High Level Synthesis, Microprocessing and Microprogramming (18), pp. 347–352, North Holland. 1986.
28. H.M. Lipp. M. Nolle and K. Sutter, “LOGE-Ein leistungsfaehiges CAD-System zum Entwurf digitaler Steuerungen,” in 10th Int. Cong. Microelectronics, Munich, Germany, 1982.
29. H. Keller, “Erzeugung der LOGE-Funktionstabellen aus DSL-Pro-grammen.” Diploma thesis, Inst. Informatik IV. Univ. Karlsruhe. 1986.
30. U. Kastens. B. Hutt, and E. Zimmermann. “GAG: A practical compiler generator.” Lecture Notes in Computer Science 141. Springer Verlag. 1982.
31. H. Kraemer, “Konstruktion der Datenflussgraphen und Generierung von Schaltungsstrukturen im DSL-Synthesesystem,” Diploma thesis. Inst. Informatik IV, Univ. Karlsruhe, 1985.
32. M. Neher, “Verhaltensbeschreibung des MC68000 in DSL und Bewertung des daraus synthetisierten Prozessors,” Diploma thesis. Inst. Technik der Informationsverarbeitung, Univ. Karlsruhe. 1986.
33. B. Knoedler and Rosenstiel, “A PROLOG Processor for Warren's Abstract Instruction Set.” Microprocessing and Microprogramming (18), pp. 71–79, North Holland. 1986.
34. J.D. Morison, N.E. Peeling, and E.V. Whiting, “Sequential programming extensions to ELLA, with automatic transformation to structure.” in Proc. ICCD′87, pp. 571–576, Rye Brook, NY. Oct. 1987.
35. V. Waite and G. Goos. Compiler Construction, New York: Springer-Verlag, 1984.
36. M. Hecht, “Flow analysis of computer programs.” in Computer Science. Amsterdam, The Netherlands: North Holland. 1977.
37. P. Marchal, M. Nicolaidis, and B. Courtois, “Microarchitecture of the MC68000 and evaluation of a self checking version,” NATO Advanced Study Inst, on Microarchitecture of VLSI Computers, Sogesto Urbino, 1984.