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Volumn 8, Issue 2, 1989, Pages 181-189
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Logic Verification Algorithms and Their Parallel Implementation
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER PROGRAMMING--ALGORITHMS;
COMPUTER SYSTEMS, DIGITAL--PARALLEL PROCESSING;
LOGIC CIRCUITS, COMBINATORIAL;
DYNAMIC SCHEDULING;
LOGIC VERIFICATION ALGORITHMS;
PARALLEL LOGIC VERIFICATION;
VERIFICATION ALGORITHM LOVER-PODEM;
LOGIC DESIGN;
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EID: 0024611364
PISSN: 02780070
EISSN: 19374151
Source Type: Journal
DOI: 10.1109/43.21836 Document Type: Article |
Times cited : (7)
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References (12)
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