On Path Selection in Combinational Logic Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 8, Issue 1, 1989, Pages 56-63

  Li, Wing Ning ^a   Reddy, Sudhakar M ^a   Sahni, Sartaj K ^b  

^a UNIVERSITY OF IOWA   (United States)

^b UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, DIGITAL; LOGIC DESIGN; MATHEMATICAL TECHNIQUES--GRAPH THEORY;

HEURISTICS; PATH SELECTION; POLYNOMIAL TIME ALGORITHM; SIGNAL PROPAGATION DELAYS;

LOGIC CIRCUITS, COMBINATORIAL;

EID: 0024480710     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.21819     Document Type: Article

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