Optimal CMOS cell transistor placement: A relaxation approach

Volumn , Issue , 1988, Pages 364-367

  Stauffer, Andre ^a   Nair, Ravi ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTOR DEVICES, MOS; TRANSISTORS, FIELD EFFECT;

CMOS CELL; GRID LAYOUT; TRANSISTOR PLACEMENT;

INTEGRATED CIRCUITS;

EID: 0024175640     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)