Doping of n+ and p+ polysilicon in a dual-gate CMOS process

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1988, Pages 238-241

  Wong, C Y ^a   Sun, J Y C ^a   Taur, Y ^a   Oh, C S ^a   Angelucci, R ^a   Davari, B ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTOR DEVICES, MOS; TRANSISTORS, FIELD EFFECT;

DUAL-GATE CMOS; FET CURRENT; FLATBAND VOLTAGES; POLYSILICON; SOURCE-DRAIN JUNCTIONS;

SEMICONDUCTING SILICON;

EID: 0024170834     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)