Design of decoders for Q-valued logic circuits.

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 1988, Pages 32-39

  Prieto, A ^a   Martin Smith, P ^a   Pelayo, F ^a   Lloris, A ^a  

^a UNIVERSITY OF GRANADA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER METATHEORY -- MANY VALUED LOGICS; INTEGRATED CIRCUITS; LOGIC CIRCUITS -- DESIGN;

COMPLEMENTARY MOS; MULTIVALUED THRESHOLD DECODERS DESIGN; Q-VALUED LOGIC CIRCUITS; QUATERNARY DECODER;

CODES, SYMBOLIC;

EID: 0024137469     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)