33 MB/s data synchronizing phase-locked-loop circuit.

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 31, Issue , 1988, Pages 12-13,-276

  Llewellyn, William D ^a   Wong, Michelle M H ^a   Tietz, Gary W ^a   Tucci, Patrick A ^a  

^a NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, DIGITAL; DATA STORAGE, MAGNETIC; INTEGRATED CIRCUITS; LOGIC CIRCUITS; OSCILLATORS;

BAUD RATE RANGE; DIGEST OF PAPER; FEEDBACK LOOP; NONRETURN-TO-ZERO; SERIAL DATA SYNCHRONIZATION;

PHASE LOCKED LOOPS;

EID: 0024133995     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)