Empirical study of on-chip parallelism.

Proceedings - Design Automation Conference

Volumn , Issue , 1988, Pages 160-165

  Bailey, Mary L ^a   Snyder, Lawrence ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT TESTING; SEMICONDUCTOR DEVICES, MOS;

CIRCUIT SIZE; EMPIRICAL STUDY; ON-CHIP PARALLELISM; PARALLEL SIMULATORS; VLSI CHIP;

INTEGRATED CIRCUITS, VLSI;

EID: 0024132229     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)