Synthesis from VHDL

Volumn , Issue , 1988, Pages 378-381

  Lis, Joseph S ^a   Gajski, Daniel D ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; LOGIC DESIGN -- OPTIMIZATION;

BEHAVIORAL DESCRIPTIONS; DATAFLOW DESCRIPTIONS; LOGIC OPTIMIZATION; MICROARCHITECTURE; VHDL SYNTHESIS SYSTEM;

INTEGRATED CIRCUITS, VLSI;

EID: 0024131743     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)