Variable delay line phase locked loop for CPU - coprocessor synchronization.

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 31, Issue , 1988, Pages 142-143,-334

  Johnson, Mark G ^a   Hudson, Edwin L ^a  

^a MIPS Technologies Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER OPERATING SYSTEMS; ELECTRIC DELAY LINES; ELECTRONIC CIRCUITS, DELAY TYPE;

COPROCESSOR; DIGEST OF PAPER; SKEW REDUCTION; VARIABLE DELAY LINES;

PHASE LOCKED LOOPS;

EID: 0024126587     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)