A Rail-To-Rail Cmos Op Amp

IEEE Journal of Solid-State Circuits

Volumn 23, Issue 6, 1988, Pages 1414-1417

  Babanezhad, Joseph N ^a  

^a Sierra Semiconductor Inc ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SIGNAL DISTORTION;

CMOS INTEGRATED CIRCUITS; HARMONIC DISTORTION; RAIL TO RAIL AMPLIFIERS;

AMPLIFIERS, OPERATIONAL;

EID: 0024122713     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.90040     Document Type: Article

References (9)

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4. R. Castello, “Low-voltage low-power S.C. signal processing techniques,” Ph.D. Dissertation, ERL Memo. M84/67, Univ. of Calif., Berkeley, Aug. 1984.
5. R. Gregorian and G. C. Temes, I New York: Wiley, 1986.
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8. D. B. Ribner and M. A. Copeland, “Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range,” IEEE J. Solid-state Circuits, vol. SC-19, pp. 919–925, Dec. 1984.
9. P. R. Gray and R. G. Meyer, “Recent advances in monolithic operational amplifier design,” IEEE Trans. Circuits Syst., vol. CAS-21, pp. 317–327, May 1974.