Assessments of SOI technologies for hardening

Microelectronic Engineering

Volumn 8, Issue 3-4, 1988, Pages 187-200

  Leray, J L ^a  

^a CEA DIF   (France)

Author keywords

device structures; hardening; radiation effects; Silicon on insulator

Indexed keywords

INTEGRATED CIRCUITS, VLSI; MICROELECTRONICS; SEMICONDUCTING SILICON--APPLICATIONS; TRANSISTORS;

CMOS/SOI VULNERABILITY; PHOTOCURRENT EFFECTS; RADIATION HARDENING; SILICON ON INSULATOR; SIMOX TECHNOLOGY; SOI TECHNOLOGIES;

SEMICONDUCTOR DEVICES, MOS;

EID: 0024122131     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/0167-9317(88)90016-0     Document Type: Article

References (14)

1. Surface effects of radiation of transistors
2. A CMOS-SOI 1.4 μm technology on 1300°C substrates without epitaxy
3. Silicon on sapphire device photoconduction predictions
4. Transient radiation effects in SOI memories
5. Transient radiation effects in SOI static RAM cells
6. Radiation-tolerant, sidewall-hardened SOI/MOS transistors
7. A study of the sensitivity to cosmic heavy ions of bit slice microprocessors in CMOS and CMOS on insulators technologies
8. Vertical bipolar transistors in laser-recrystallized polysilicon
9. 2
10. Total dose hardening of buried insulator in implanted SOI structures
11. Electrical and radiation characterization of three SOI material technologies
12. Dose and dose-rate intrinsic sensitivity of substrate and MOS structures on stabilized zirconia (SOZ). A comparison with SOS
13. An experimental facility for the study of effects of heavy ion irradiation on logic microcircuits