메뉴 건너뛰기




Volumn 35, Issue 11, 1988, Pages 1866-1875

A Physical Short-Channel Model for the Thin-Film SOI MOSFET Applicable to Device and Circuit CAD

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS -- COMPUTER AIDED DESIGN; SEMICONDUCTOR DEVICES -- COMPUTER AIDED DESIGN; SOLID STATE DEVICES, THIN FILM -- COMPUTER AIDED DESIGN;

EID: 0024106969     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.7399     Document Type: Article
Times cited : (108)

References (25)
  • 1
    • 0019079369 scopus 로고
    • A two-dimensional analysis for MOSFET ' s fabricated on buried SiO2, layer
    • Nov.
    • H. K. Lim and J. G. Fossum, “A charge-based large-signal model for thin-film SOI MOSFET’s,” IEEE Trans. Electron Devices, vol. ED-32, p. 446, Feb. 1985.
    • (1980) IEEE Trans. Electron Devices , vol.ED-27 , pp. 2043
    • Sano, E.1    Kasai, R.2    Ohwada, K.3    Ariyoshi, H.4
  • 2
    • 0039740033 scopus 로고
    • A charge-based large-signal model for thin-film SOI MOSFET's
    • Feb.
    • K. Kato and K. Taniguchi, “Floating substrate effects on the characteristics of SOI MOSFET,” in Proc. 2nd Int. Workshop Future Electron Devices—SOI Technology 3D Integration (Mar. 19–21, 1985), p. 123.
    • (1985) IEEE Trans. Electron Devices , vol.ED-32 , pp. 446
    • Lim, H.K.1    Fossum, J.G.2
  • 4
    • 0022753908 scopus 로고
    • Modeling of 0.1-m MOSFET on SOI structure using Monte Carlo simulation technique
    • July
    • G. A. Armstrong, R. S. Ferguson, and J. R. Davis, “A device simulator for silicon-on-insulator MOSFET’s,” in Simulation of Semiconductor Devices and Processes, vol. 2, K. Board and D. Owen, Eds. Swansea, U.K.: Pineridge, 1986, p. 449.
    • (1986) IEEE Trans. Electron Devices , vol.ED-33 , pp. 1005
    • Throngumchai, K.1    Asada, K.2    Sugano, T.3
  • 8
    • 84939330674 scopus 로고
    • Santa Clara, CA
    • TECAP 2E.00 Manuals, Hewlett-Packard Co., Santa Clara, CA, 1985.
    • (1985) Hewlett-Packard Co
  • 9
    • 0003369344 scopus 로고    scopus 로고
    • SPICE2: A computer program to simulate semiconductor circuits
    • Berkeley, ERL Memo May
    • L. W. Nagel, SPICE2: A computer program to simulate semiconductor circuits, Electron. Res. Lab., Univ. of California, Berkeley, ERL Memo. ERL-M520, May 1975.
    • Electron. Res. Lab., Univ. of California , vol.ERL-M520
    • Nagel, L.W.1
  • 13
    • 0021501347 scopus 로고
    • The effect of high fields on MOS device and circuit performance
    • Oct
    • C. G. Sodini, P.-K. KO, and J. L. Moll, The effect of high fields on MOS device and circuit performance, IEEE Trans. Electron Devices, vol. ED-31, p. 1386, Oct. 1984.
    • (1984) IEEE Trans. Electron Devices , vol.ED-31 , pp. 1386
    • Sodini, C.G.1    Ko, P.K.2    Moll, J.L.3
  • 14
    • 0019048875 scopus 로고
    • Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
    • Aug
    • S. C. Sun and J. D. Plummer, Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces, IEEE Trans. Electron Devices, vol. ED-27, p. 1497, Aug. 1980.
    • (1980) IEEE Trans. Electron Devices , vol.ED-27 , pp. 1497
    • Sun, S.C.1    Plummer, J.D.2
  • 16
    • 0343975415 scopus 로고    scopus 로고
    • Modeling small-geometry silicon-on-insulator transistors for device and circuit computer-aided design
    • Ph.D. dissertation, Univ. of Florida, Gainesville
    • S. Veeraraghavan, Modeling small-geometry silicon-on-insulator transistors for device and circuit computeraided design, Ph.D. dissertation, Univ. of Florida, Gainesville, 1988.
    • Veeraraghavan, S.1
  • 17
    • 0016619927 scopus 로고
    • Modelling weak avalanche multiplication currents in IGFETs and SOS transistors for CAD
    • Y. A. El-Mansy and D. M. Caughey, Modelling weak avalanche multiplication currents in IGFETs and SOS transistors for CAD, in IEDM Tech. Dig., 1975
    • (1975) IEDM Tech. Dig
    • El-Mansy, Y.A.1    Caughey, D.M.2
  • 18
    • 0018027059 scopus 로고
    • A charge-oriented model for MOS transistor capacitances
    • Oct
    • D. E. Ward and R. W. Dutton, A charge-oriented model for MOS transistor capacitances, IEEE J. Solid-Srate Circuits, vol. SC-13, p. 703, Oct. 1978.
    • (1978) IEEE J. Solid-Srate Circuits , vol.SC-13 , pp. 703
    • Ward, D.E.1    Dutton, R.W.2
  • 19
    • 0008813556 scopus 로고
    • Significance of the channel charge partition in the transient MOSFET model
    • Oct
    • J. G. Fossum, H. Jeong, and S. Veeraraghavan, Significance of the channel charge partition in the transient MOSFET model, IEEE Trans. Electron Devices, vol. ED-33, p. 1621, Oct. 1986.
    • (1986) IEEE Trans. Electron Devices , vol.ED-33 , pp. 1621
    • Fossum, J.G.1    Jeong, H.2    Veeraraghavan, S.3
  • 21
    • 84939335638 scopus 로고    scopus 로고
    • private communication
    • W. Krull, private communication.
    • Krull, W.1
  • 23
    • 0020830319 scopus 로고
    • Threshold voltage of thin-film silicon-on-insulator (Sol) MOSFETs
    • Oct
    • H.-K. Lim and J. G. Fossum, Threshold voltage of thin-film silicon-on-insulator (Sol) MOSFETs, IEEE Trans. Electron Devices, Vol. ED-30, p. 1244, Oct. 1983
    • (1983) IEEE Trans. Electron Devices , vol.ED-30 , pp. 1244
    • Lim, H.K.1    Fossum, J.G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.