2-Domain Model for Discrete-Time PLL's

IEEE Transactions on Circuits and Systems

Volumn 35, Issue 11, 1988, Pages 1393-1400

  Hein, Jerrell P ^a   Scott, Jeffrey W ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FILTERS, DIGITAL; ELECTRONIC CIRCUITS, TIMING; INTEGRATED CIRCUITS; MATHEMATICAL TECHNIQUES--TRANSFER FUNCTIONS; MATHEMATICAL TRANSFORMATIONS--Z TRANSFORMS;

DIGITAL SIGNALING INTERFACE; DISCRETE TIME PLL; TRANSIMPEDANCE LOOP FILTER;

PHASE LOCKED LOOPS;

EID: 0024104186     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/31.14463     Document Type: Article

References (5)

1. F. Gardner, Phaselock Techniques. New York: Wiley, 1979.
2. P. Gray and R. Meyer, Analysis and Design of Analog Integrated Circuits. New York: Wiley, 1984.
3. R. Best, Phase-locked Loops. New York: McGraw-Hill, Inc. 1984.
4. F. Gardner, “Charge pump phaselock loops”, IEEE Trans. Commun., vol. COM-28, Nov. 1980.
5. A. Oppenheim and R. Schafer, Digital Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1975.