Direct Evidence Supporting the Premises of a Two-Dimensional Diode Model for the Parasitic Thyristor in CMOS Circuits Built on Thin Epi

IEEE Electron Device Letters

Volumn 9, Issue 10, 1988, Pages 509-511

  Chatterjee, Amitava ^a   Seitchik, Jerold A ^a   Chern, Jue Hsien ^a   Yang, Ping ^a   Wei, C C ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; SEMICONDUCTOR DIODES; THYRISTORS;

2-D P-I-N DIODE; CMOS INTEGRATED CIRCUITS; NEGATIVE RESISTANCE REGIONS; PARASITIC THYRISTOR IN CMOS CIRCUITS; RESISTANCE MODULATION;

INTEGRATED CIRCUITS;

EID: 0024091524     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.17827     Document Type: Article

References (10)

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