A new experimental method to determine the saturation voltage of a small-geometry MOSFET

Solid State Electronics

Volumn 31, Issue 9, 1988, Pages 1421-1431

  Jang, Wen Yueh ^a   Wu, Chung Yu ^c   Wu, Hong Jen ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b UNITED MICROELECTRONICS CORPORATION   (Taiwan)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

MATHEMATICAL MODELS; TRANSISTORS, FIELD EFFECT;

CMOS PROCESS; NMOS PROCESS; PARAMETER EXTRACTION METHODS; SATURATION VOLTAGE; SMALL-GEOMETRY MOSFET; SPICE MOS MODELS;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0024069241     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(88)90108-6     Document Type: Article

References (12)

1. An accurate large-signal MOS transistor model for use in computer-aided design
2. Drift velocity saturation in MOS transistors
3. Conductance of MOS transistors in saturation
4. Current/voltage characteristics, channel pinchoff and field dependence of carrier velocity in silicon insulated-gate field-effect transistors
5. The simulation of MOS integrated circuits using SPICE2
6. An experimental method for the determination of the saturation point of a MOSFET
7. VLSI limitations from drain-induced barrier lowering
8. Device characteristics of short-channel and narrow-width MOSFET's