Scheduling Semiconductor Wafer Fabrication

IEEE Transactions on Semiconductor Manufacturing

Volumn 1, Issue 3, 1988, Pages 115-130

  Wein, Lawrence M ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, VLSI;

MANUFACTURING INTERVAL; MEAN THROUGHPUT TIME; MULTICLASS QUEUING NETWORK MODEL; SEMICONDUCTOR WAFER; TURNAROUND TIME;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0024055865     PISSN: 08946507     EISSN: 15582345     Source Type: Journal    
DOI: 10.1109/66.4384     Document Type: Article

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