Block floating-point implementation of digital filters using the DSP56000

Microprocessors and Microsystems

Volumn 12, Issue 6, 1988, Pages 299-308

  Sridharan, S ^a   Dickman, G ^a  

^a QUEENSLAND UNIVERSITY OF TECHNOLOGY   (Australia)

Author keywords

digital signal processors; DSP56000; filters; floating point operations

Indexed keywords

COMPUTER PROGRAMS; SIGNAL PROCESSING - DIGITAL TECHNIQUES;

BIQUAD DIGITAL FILTER; FIXED-POINT DIGITAL SIGNAL PROCESSOR; FLOATING-POINT ALGORITHMS; FLOATING-POINT ARITHMETIC;

ELECTRIC FILTERS, DIGITAL;

EID: 0024051476     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/0141-9331(88)90186-X     Document Type: Article

References (4)

1. Finite wordlength considerations in the implementation of digital filters
2. A new approach to block floating point arithmetic in recursive digital filters
3. Implementation of high-order direct form digital filter structures
4. Implementation of state-space digital filters using block floating-point arithmetic