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Volumn 37, Issue 6, 1988, Pages 735-739
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A Comparison of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or Standard Bases
a a a b |
Author keywords
Dual basis; finite field; irreducible polynomial; normal basis; standard basis; VLSI
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Indexed keywords
COMPUTER PROGRAMMING - ALGORITHMS;
COMPUTERS - MULTIPLYING CIRCUITS;
INTEGRATED CIRCUITS, VLSI - DESIGN;
SEMICONDUCTOR DEVICES, MOS;
DUAL-BASIS MULTIPLIER;
FINITE-FIELD MULTIPLIERS;
MASSEY-OMURA NORMAL BASIS MULTIPLIER;
SCOTT-TAVARES-PEPPARD STANDARD BASIS MULTIPLIER;
COMPUTER ARCHITECTURE;
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EID: 0024029936
PISSN: 00189340
EISSN: None
Source Type: Journal
DOI: 10.1109/12.2212 Document Type: Article |
Times cited : (92)
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References (7)
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