메뉴 건너뛰기




Volumn 7, Issue 1, 1988, Pages 11-20

Methodologies for Testing Embedded Content Addressable Memories

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING - ALGORITHMS; FAILURE ANALYSIS - COMPUTER APPLICATIONS;

EID: 0023871372     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.3126     Document Type: Article
Times cited : (16)

References (15)
  • 1
    • 0022794746 scopus 로고
    • Built-in self testing of embedded memories
    • Oct.
    • S. Jain and C. Stroud, “Built-in self testing of embedded memories”, IEEE Design and Test of Computers, pp. 27-37, Oct. 1986.
    • (1986) IEEE Design and Test of Computers , pp. 27-37
    • Jain, S.1    Stroud, C.2
  • 2
    • 0021540210 scopus 로고
    • Self-testing of embedded RAMs
    • Z. Sun and L. T. Wang, “Self-testing of embedded RAMs”, in Proc. Int. Test Conf, 1984, pp. 148-156.
    • (1984) Proc. Int. Test Conf , pp. 148-156
    • Sun, Z.1    Wang, L.T.2
  • 3
    • 0022184872 scopus 로고
    • An efficient built-in self test scheme for functional test of embedded RAMs
    • M. Nicolaidis, “An efficient built-in self test scheme for functional test of embedded RAMs”, in Proc. Int. Test Conf., 1985, pp. 118-123.
    • (1985) Proc. Int. Test Conf. , pp. 118-123
    • Nicolaidis, M.1
  • 4
    • 0021548476 scopus 로고
    • Random testing for stuck-at storage cells in an embedded memory
    • W. H. McAnney, P. H. Bardell, and V. P. Gupta, “Random testing for stuck-at storage cells in an embedded memory”, in Proc. Int. Test Conf, 1984, pp. 157-166.
    • (1984) Proc. Int. Test Conf , pp. 157-166
    • McAnney, W.H.1    Bardell, P.H.2    Gupta, V.P.3
  • 5
    • 0022329226 scopus 로고
    • A methodology for testing content addressable memories
    • G. Giles and C. Hunter, “A methodology for testing content addressable memories”, in Proc. Int. Test Conf, 1985, pp. 471-474.
    • (1985) Proc. Int. Test Conf , pp. 471-474
    • Giles, G.1    Hunter, C.2
  • 8
    • 0017634911 scopus 로고
    • An integrated test concept for switched-capacitor dynamic MOS RAM's
    • Dec.
    • T. C. Lo and M. R. Guidry, “An integrated test concept for switched-capacitor dynamic MOS RAM's”, IEEE J. Solid-State Circuits, vol. SC-12, pp. 693-703, Dec. 1977.
    • (1977) IEEE J. Solid-State Circuits , vol.SC-12 , pp. 693-703
    • Lo, T.C.1    Guidry, M.R.2
  • 10
    • 0019030541 scopus 로고
    • Test procedures for a class of pattern sensitive faults in semiconductor random access memories
    • June
    • D. S. Suk and S. M. Reddy, “Test procedures for a class of pattern sensitive faults in semiconductor random access memories”, IEEE Trans. Comput., vol. C-29, pp. 419-429, June 1980.
    • (1980) IEEE Trans. Comput. , vol.C-29 , pp. 419-429
    • Suk, D.S.1    Reddy, S.M.2
  • 12
    • 0018997597 scopus 로고
    • Testing memories for single-cell pattern-sensitive faults
    • Mar.
    • J. P. Hayes, “Testing memories for single-cell pattern-sensitive faults”, IEEE Trans. Comput., vol. C-29, pp. 249-254, Mar. 1980.
    • (1980) IEEE Trans. Comput. , vol.C-29 , pp. 249-254
    • Hayes, J.P.1
  • 13
    • 0023171952 scopus 로고
    • Design and algorithms for parallel testing of random access and content addressable memories
    • July
    • P. Mazumder, J. H. Patel, and W. K. Fuchs, “Design and algorithms for parallel testing of random access and content addressable memories”, in Proc. Design Automat. Conf, vol. 24, July 1987, pp. 688-694.
    • (1987) Proc. Design Automat. Conf , vol.24 , pp. 688-694
    • Mazumder, P.1    Patel, J.H.2    Fuchs, W.K.3
  • 14
    • 84939343530 scopus 로고
    • Testing and fault-tolerant aspects of high-density VLSI memory
    • Ph.D. thesis, Department of Electrical and Computer Engineering, University of Illinois, Aug.
    • P. Mazumder, “Testing and fault-tolerant aspects of high-density VLSI memory”, Ph.D. thesis, Department of Electrical and Computer Engineering, University of Illinois, Aug. 1987.
    • (1987)
    • Mazumder, P.1
  • 15
    • 0023524815 scopus 로고
    • Planar decomposition for quadtree data structure
    • June
    • P. Mazumdar, “Planar decomposition for quadtree data structure”, Computer Vision, Graphics, and Image Processing, vol. 38, pp. 258-274, June 1987.
    • (1987) Computer Vision, Graphics, and Image Processing , vol.38 , pp. 258-274
    • Mazumdar, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.