Characterization of Via Connections in Silicon Circuit Boards

IEEE Transactions on Microwave Theory and Techniques

Volumn 36, Issue 1, 1988, Pages 21-27

  Quine, John P ^a   Webster, Harold F ^a   Glascock, Homer H ^a   Carlson, Richard O ^a  

^a GENERAL ELECTRIC COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING SILICON; SIGNAL INTERFERENCE - CROSSTALK; TELECOMMUNICATION LINES, STRIP - ANALYSIS;

BULK SILICON WAFER; CONDUCTING VIA CONNECTIONS; INSERTION LOSS; VIRTUAL STANDING WAVE RATIO (VSWR);

PRINTED CIRCUITS;

EID: 0023849002     PISSN: 00189480     EISSN: 15579670     Source Type: Journal    
DOI: 10.1109/22.3477     Document Type: Article

References (6)

1. R. W. Johnson et. al., “ Hybrid silicon wafer-scale packaging technology,” in Proc. 1986 IEEE Int. Solid State Circuits Conf., Feb. 20, 1986, pp. 166–167.
2. J. F. McDonald, A. J. Steckl, C. A. Neugebauer, R. O. Carlson, and A. S. Bergendahl, “Multilevel interconnections for wafer scale integration,” J. Vac. Sci. Techno l., vol. A4, no. 6, pp. 3127–3138, Nov./Dec. 1986.
3. H. H. Glascock, J. A. Loughran, and H. F. Webster, “Isolated conducting vias in silicon circuit boards,” General Electric Co. Rep. 86CRD010 (class 1), Feb. 1986.
4. A. R. von Hippel, Dielectrics and Waves. New York: Wiley, 1954, pp. 228–234.
5. H. Hasegawa, M. Furukawa, and H. Yanai, “Properties of microstrip line in Si-SiO 2 systems,” IEEE Trans. Microwave Theory Tech., vol. MTT-19, pp. 869–881, Nov. 1971.
6. C. M. Krowne, “Slow-wave propagation in two types of cylindrical waveguides loaded with a semiconductor,” IEEE Trans., Microwave Theory Tech., vol. MTT-33, pp. 335–339, Apr. 1985.