Automatic Graph Drawing and Readability of Diagrams

IEEE Transactions on Systems, Man and Cybernetics

Volumn 18, Issue 1, 1988, Pages 61-79

  Tamassia, Roberto ^a   Battista, Giuseppe Di ^b   Batini, Carlo ^b  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b SAPIENZA UNIVERSITY OF ROME   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING - ALGORITHMS; MATHEMATICAL TECHNIQUES - GRAPH THEORY;

AUTOMATIC GRAPH DRAWING; CARPANO ALGORITHM; FAST COMPACTION ALGORITHM; HIERARCHIC GRAPHS; PLAHARIZATION;

DRAFTING PRACTICE;

EID: 0023843418     PISSN: 00189472     EISSN: 21682909     Source Type: Journal    
DOI: 10.1109/21.87055     Document Type: Article

References (54)

1. A. Aho, J. Hopcroft, and J. Ullman, The Design and Analysis of Computer Algorithms Reading, MA: Addison-Wesley 1974
2. F. Aschim and B. M. Mostue, “IFIP WG 8.1 case solved using SYSDOC and SYSTEMATOR,” in Information Systems Design Methodologies: A Comparative Review (Proc. IFIP WG 8.1 Working Conf. Comparative Review of Information Systems Design Methodologies) T. Olle et al., Eds. New York: North-Holland, 1982, pp. 15–40.
3. C. Batini, M. Talamo, and R. Tamassia, “Computer aided layout of entity-relationship diagrams,” J. Syst. Software, vol. 4, pp. 163–173, 1984.
4. C. Batini, L. Furlani, and E. Nardelli, “What is a good diagram? A pragmatic approach,” in Proc. 4th Int. Conf. Entity Relationship Approach, Chicago, IL, 1985.
5. C. Batini, E. Nardelli, M. Talamo, and R. Tamassia, “GINCOD; A graphical tool for conceptual design of data base applications,” in Computer Aided Data Base Design, A. Albano, V. De Antonellis, and A. Di Leva, Eds. New York: North-Holland, 1985, pp. 33–51.
6. C. Batini, E. Nardelli, and R. Tamassia, “A layout algorithm for data-flow diagrams,” IEEE Trans. Software Eng., vol. SE-12, no. 4, pp. 538–546, 1986.
7. M. J. Carpano, “Automatic display of hierarchized graphs for computer aided decision analysis,” IEEE Trans. Syst. Man Cybern., vol. SMC-10, no. 11, pp. 705-715, 1980.
8. S. Ceri, Ed., Methodology and Tools for Data Base Design. New York: North-Holland, 1983.
9. E. Chan and F. H. Lochowsky, “A graphical data base design aid using the E-R model,” in Entity-Relationship Approach to Systems Analysis and Design, P. Chen, Ed. New York: North-Holland, 1980, 295–310.
10. N. Chiba, K. Onoguchi, and T. Nishizeki, “Drawing planar graphs nicely,” Acta Informatica, vol. 22, pp. 187–201, 1985.
11. M. Davis, “A layout algorithm for a graph browser,” M.S. Project Rep., EECS Dept., Univ. of California, Berkeley, 1984.
12. T. De Marco, Structured Analysis and System Specification. Yourdon Press, 1979.
13. Data Designer, “Product description,” Ann Arbor, MI, 1981.
14. G. Di Battista and E. Nardelli, “An algorithm for testing planarity of hierarchical graphs,” in Graph-Theoretic Concepts in Computer Science, Proc. Int. Workshop WG ’86, Bernierd, June 1986, G. Tinhofer and G. Schmidt, Eds., Lecture Notes in Computer Science, vol. 246. New York: Springer-Verlag, 1987, pp. 277–289.
15. P. Eades, “A heuristic for graph drawing,” Congr. Numer. vol. 42. pp. 149–160, 1984.
16. P. Eades, B. McKay, and N. Wormald, “An NP-hard crossing number problem for bipartite graphs,” Dept. of Computer Science, Univ. of Queensland, Tech. Rep. 60, 1985.
17. P. Eades and D. Kelly, “Heuristics for reducing crossings in 2-layered networks,” Ars Combinatoria, vol. 21.A, pp. 89–98, 1986.
18. P. Eades and N. Wormald, “The median heuristic for drawing 2-layered networks,” Dept, of Computer Science, Univ. of Queensland, Tech. Rep. 69, 1986.
19. S. Even, Graph Algorithms. Computer Science Press. 1979.
20. I. Fary, “On straight lines representations of planar graphs,” Acta Sci. Math. Szeged, vol. 11, 229–233, 1948.
21. C. Gane and T. Sarson, Structured System Analysis. Englewood Cliffs, NJ: Prentice-Hall, 1979.
22. M. Y. Hsueh, “Symbolic layout and compaction of integrated circuits,” Ph.D. dissertation, Univ. of California, Berkeley, 1979.
23. J. Hynd and P. Eades, “The typed graph editing system—TYGES,” in Proc. 3rd Australasian Conf. Computer Graphics (Ausgraph 85). Brisbane, Australia, 1985, pp. 15–19.
24. Graphics Interfaces V. 2.1 for PSA or SEM — User's Manual ISDOS Ref. 82GI2-0400-0, ISDOS Project, Univ. of Michigan, Ann Arbor, 1982.
25. D. S. Johnson, “The WP-completeness column: An ongoing guide,” J. Algorithms, vol. 3, no. 1, pp. 89–99, 1982.
26. R. Lipton, D. Rose, and R. Tarjan, “Generalized nested dissection,” SIAM J. Num. Anal., vol. 16, no. 2, pp. 346–358, 1979.
27. C. Meyer, “A browser for directed graphs,” M.S. thesis Project Rep., EECS Dept., Univ. of California, Berkeley, 1983.
28. E. Nardelli and M. Talamo, “A fast algorithm for planarization of diagrams,” Rome, Tech. Rep. R.105, IASI-CNR, 1984.
29. A. R. Newton, “Computer aided design of VLSI circuits,” Proc. IEEE, vol. 69, no. 10, 1981.
30. T. Olle, H. Sol, and Verijin-Stuart, Eds., Information Systems Design Methodologies: A Comparative Review (Proc. IFIP WG 8.1 Working Conf. Comparative Review of Information Systems Design Methodologies). New York: North-Holland, 1982.
31. R. M. Otten and J. G. van Wijk, “Graph representations in interactive layout design,” in Proc. IEEE Int. Symp. Circuits and Systems, New York, 1978, pp. 914–918.
32. D. Reiner et al., “A database design and evaluation workbench: Preliminary report,” in Proc. Int. Conf. Systems Development and Requirements Specification, Gothenburg, Sweden, 1984
33. D. Reiner and G. Brown, “Heuristic layout for DDEW ER + diagrams,” Manuscript, Computer Corporation of America, 1985.
34. E. Reingold and J. Tilford, “Tidier drawing of trees,” IEEE Trans. Software Eng., vol. SE-7, no. 2, pp. 223–228, 1981.
35. P. Rosenstiehl and R. E. Tarjan, “Rectilinear planar layouts of planar graphs and bipolar orientations,” Discrete. Computational Geometry, vol. 1, no. 4, pp. 342–351, 1986.
36. D. Ross and K. Shoman, “Structured analysis for requirements definition,” IEEE Trans. Software Eng., vol. SE-3, no. 1, 1977.
37. L. Rowe et al., “A browser for directed graphs,” Manuscript, E.E.C.S. Dept., Univ. of California, Berkeley, 1986.
38. J. Soukup, “Circuit layout,” Proc. IEEE, vol. 69, no. 10, 1981.
39. J. A. Storer, “On minimal node-cost planar embeddings,” Networks, vol. 14, pp. 181–212, 1984.
40. K. Sugiyama, S. Tagawa, and M. Toda, “Methods for visual understanding of hierarchical systems,” IEEE Trans. Syst. Man Cybern., vol. SMC-11, no. 2, pp. 109–125, 1981.
41. K. Supowit and E. Reingold, “The complexity of drawing trees nicely,” Acta Informatica, vol. 18, pp. 377–392, 1983.
42. R. Tamassia and I. G. Tollis, “A unified approach to visibility representations of planar graphs,” Discrete Computational Geometry, vol. 1, no. 4, pp. 321–341, 1986.
43. ___, “Efficient embedding of planar graphs in linear time,” in Proc. IEEE Int. Symp. Circuits and Systems, Philadelphia, PA, 1987, pp. 495–498.
44. R. Tamassia, “On embedding a graph in the grid with the minimum number of bends,” SIAM J. Comput., vol. 16. no. 3, pp. 421–444, 1987.
45. EXCELERATOR: A Guided Tour, Index Technology Co., Cambridge, MA, 1985.
46. D. Teichroew and E. Hershey, “PSL/PSA: A computer aided technique for structured documentation and analysis of information processing systems,” IEEE Trans. Software Eng., vol. SE-3, no. 1, 1977.
47. C. Thomassen, “Planarity and duality of finite and infinite planar graphs,” J. Combin. Theory, Series B, vol. 29, pp. 244–271, 1980.
48. W. T. Tutte, “Convex representations of graphs,” Proc. London Math Soc., vol. 10, pp. 304–320, 1960.
49. “How to draw a graph,” Proc. London Math Soc., vol. 3, no. 13, pp. 743–768, 1963.
50. J. Vaucher, “Pretty printing of trees,” Software Practice, Experience, vol. 10, no. 7, pp. 553–561, 1980.
51. K. Wagner, “Bemerkungen zum Vierfarbenproblem,” Jber. Deutsch. Math.-Verein, vol. 46, pp. 26–32, 1936.
52. J. Warfield, “ Crossing theory and hierarchy mapping,” IEEE Trans. Syst. Man Cybern., vol. SMC-7, no. 7, pp. 502–523, 1977.
53. C. Wetherell and A. Shannon, “Tidy drawing of trees,” IEEE Trans. Software Eng., vol. SE-5, no. 5, pp. 514–520, 1979.
54. D. Woods, “Drawing planar graphs,” Ph.D. dissertation, Computer Science Dept., Stanford Univ., Stanford, CA, Tech. Rep. STAN-CS-82-943, 1982.