High-Quality CMOS in Thin (100 nm) Silicon on Sapphire

IEEE Electron Device Letters

Volumn 9, Issue 1, 1988, Pages 32-34

  Garcia, G A ^a   Reedy, Ronald E ^a   Burgener, M L ^a  

^a Naval Command   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTING FILMS; SEMICONDUCTING SILICON - GROWTH;

100-NM-THICK SILICON-ON-SAPPHIRE (SOS); COMPLEMETNARY MOS (CMOS); DEEP TRAP LEVELS MEASUREMENTS; DOUBLE SOLID-PHASE EPITAXIALLY (DSPE) IMPROVED MATERIAL; ENHANCEMENT-MODE N-CHANNEL AND P-CHANNEL MOSFET;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0023831863     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.20404     Document Type: Article

References (15)

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