EXPERIMENTAL TECHNOLOGY AND CHARACTERIZATION OF SELF-ALIGNED 0. 1 mu M-GATE-LENGTH LOW-TEMPERATURE OPERATION NMOS DEVICES.

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1987, Pages 397-400

  Sai Halasz, G A ^a   Wordeman, M R ^a   Kern, D P ^a   Ganin, E ^a   Rishton, S ^a   Ng, H Y ^a   Zicherman, D S ^a   Moy, D ^a   Chang, T H P ^a   Dennard, R H ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

TRANSISTORS, FIELD EFFECT - LOW TEMPERATURE EFFECTS;

CRYOGENIC OPERATION; SELF-ALIGNED MOSFET; SILICON FET TECHNOLOGY; SUBMICRON GATE LENGTH;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0023548196     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)