DEVICE AND PARASITIC ORIENTED CIRCUIT EXTRACTOR.

Volumn , Issue , 1987, Pages 430-433

  Korzec, D ^a   Wojtasik, A ^a   Syrzycki, M ^a   Piwowarska, E ^a   Pleskacz, W ^a   Kuzmicz, W ^a   Maly, W ^a  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS - COMPUTER AIDED DESIGN;

MASK MISALIGNMENTS; PARASITIC ORIENTED CIRCUIT EXTRACTOR; SPOT DEFECTS; UNDER-/OVER-ETCHING; VLSI DESIGN VERIFICATION;

INTEGRATED CIRCUITS, VLSI;

EID: 0023532217     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)