Efficient Numerical Simulation of the High-Frequency MOS Capacitance

IEEE Transactions on Electron Devices

Volumn 34, Issue 10, 1987, Pages 2214-2216

  Watt, Jeffrey T ^a   Plummer, James D ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE;

HF MOS CAPACITANCE; MOSCAP C-V PROGRAM;

SEMICONDUCTOR DEVICES, MOS;

EID: 0023436312     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1987.23220     Document Type: Article

References (10)

1. G. Baccarani and M. Seven, “On the accuracy of the theoretical high-frequency semiconductor capacitance for inverted MOS structures,” IEEE Trans. Electron Devices, vol. ED-21, pp. 122-125, 1974.
2. M. J. McNutt and C. T. Sah, “High frequency space charge layer capacitance of strongly inverted semiconductor surfaces,” Solid-State Electron, vol. 17, pp. 377-385, 1974.
3. J. R. Brews, “An improved high-frequency MOS capacitance formula,” J. Appl. Phys, vol. 45, pp. 1276-1279, 1974.
4. A. Berman and D. R. Kerr, “Inversion charge redistribution model of the high-frequency MOS capacitance,” Solid-State Electron., vol. 17, pp. 735-742, 1974.
5. J. R. Brews, “A simplified high-frequency MOS capacitance formula,” Solid-State Electron., vol. 20, pp. 607-608, 1977.
6. R. C. Jaeger, F. H. Gaensslen, and S. E. Diehl, “An efficient numerical algorithm for simulation of MOS capacitance,” IEEE Trans. Computer-Aided Design of [CAS, vol. CAD-2, pp. 111-116, 1983.
7. R. C. Jaeger and F. H. Gaensslen, “Simulation of impurity freezeout through numerical solution of Poisson's equation with application to MOS device behavior,” IEEE Trans. Electron Devices, vol. ED-27, pp. 914-920, 1980.
8. R. C. Jaeger, F. H. Gaensslen, and S. E. Diehl, “Numerical simulation of MOS capacitance for a wide range of temperatures, impurity profiles, and surface state densities,” in ISSCC Tech. Dig., pp. 14-15, 1982.
9. J. R. Pfiester, “Performance limits of CMOS very large scale integration,” Tech. Rep. G541-1, Stanford Univ., Stanford, CA, 1984.
10. C. P. Ho, S. E. Hansen, and P. M. Fahey, “SUPREM III-A program for integrated circuit process modeling and simulation,” Tech. Rep. SEL84-001, Stanford Univ., Stanford, CA, 1984.