-
1
-
-
0021640131
-
Trends in megabit dRAMs
-
S. Asai, “Trends in megabit dRAMs,” in IEDM Tech. Dig., p. 6, 1984.
-
(1984)
IEDM Tech. Dig.
, pp. 6
-
-
Asai, S.1
-
2
-
-
0022334715
-
Thin oxide reliability
-
C. Hu, “Thin oxide reliability,” in IEDM Tech. Dig., 1985.
-
(1985)
IEDM Tech. Dig.
-
-
Hu, C.1
-
3
-
-
0020934144
-
Leakage-current increase in amorphous Ta2O5 films due to pinpole growth during annealing below 600°C
-
S. Kimura, Y. Nishioka, A. Shintani, and K. Mukai, “Leakage-current increase in amorphous Ta2O5 films due to pinpole growth during annealing below 600°C,” J. Electrochem. Soc., vol. 130, p. 2414, 1983.
-
(1983)
J. Electrochem. Soc.
, vol.130
, pp. 2414
-
-
Kimura, S.1
Nishioka, Y.2
Shintani, A.3
Mukai, K.4
-
4
-
-
0022752021
-
Selective studies of crystalline Ta2O5 films
-
S. Roberts, J. Ryan, and L. Nesbit, “Selective studies of crystalline Ta2O5 films,” J. Electrochem. Soc., vol. 133, p. 1405, 1986.
-
(1986)
J. Electrochem. Soc.
, vol.133
, pp. 1405
-
-
Roberts, S.1
Ryan, J.2
Nesbit, L.3
-
5
-
-
84939387245
-
Dielectric characteristics of a very thin Ta2O5 MIS capacitor
-
(Cincinnati, OH)
-
Y. Nishioka, S. Kimura, and K. Mukai, “Dielectric characteristics of a very thin Ta2O5 MIS capacitor,” in Ext. Abst. 165th Electrochem. Soc. Meeting (Cincinnati, OH), p. 160, 1984.
-
(1984)
Ext. Abst. 165th Electrochem. Soc. Meeting
, pp. 160
-
-
Nishioka, Y.1
Kimura, S.2
Mukai, K.3
-
7
-
-
0021422501
-
Some properties of crystallized tantalum pentoxide thin films on silicon
-
G. S. Qehrlein, F. M. d'Heurle, and A. Reisman, “Some properties of crystallized tantalum pentoxide thin films on silicon,” J. Appl. Phys., vol. 55, no. 10, p. 3715, 1984.
-
(1984)
J. Appl. Phys.
, vol.55
, Issue.10
, pp. 3715
-
-
Qehrlein, G.S.1
d'Heurle, F.M.2
Reisman, A.3
-
8
-
-
0020845715
-
Electrical properties of amorphous tantalum pentoxide thin film on silicon
-
G. S. Oehrlein and A. Reisman, “Electrical properties of amorphous tantalum pentoxide thin film on silicon,” J. Appl. Phys., vol. 54, no 11, p. 6502, 1983.
-
(1983)
J. Appl. Phys.
, vol.54
, Issue.11
, pp. 6502
-
-
Oehrlein, G.S.1
Reisman, A.2
-
9
-
-
36549093766
-
Influence of SiO, at the Ta2O5/Si interface on dielectric characteristics of Ta2O5 capacitors
-
Y. Nishioka, H. Shinriki, and K. Mukai, “Influence of SiO, at the Ta2O5/Si interface on dielectric characteristics of Ta2O5 capacitors,” J. Appl. Phys., vol. 61, no, 6, p. 2335, 1987.
-
(1987)
J. Appl. Phys.
, vol.61
, Issue.6
, pp. 2335
-
-
Nishioka, Y.1
Shinriki, H.2
Mukai, K.3
-
10
-
-
0020101518
-
Quadruply self-aligned stacked high-capactance RAM using Ta2 O5;high-density VLSI dynamic memory
-
K. Ohta, K. Yamada, and Y. Tarui, “Quadruply self-aligned stacked high-capactance RAM using Ta2 O5;high-density VLSI dynamic memory,” IEEE Trans. Electron Devices, vol. ED-29, p. 368, 1982.
-
(1982)
IEEE Trans. Electron Devices
, vol.ED-29
, pp. 368
-
-
Ohta, K.1
Yamada, K.2
Tarui, Y.3
-
11
-
-
0020906914
-
Interfacial oxidation of Ta2O5-Si systems for high-density D-RAM
-
T. Kato, T. Ito, M. Taguchi, T. Nakamura, and H. Ishikawa, “Interfacial oxidation of Ta2O5-Si systems for high-density D-RAM,” in Proc. Symp. VLSI Tech., p. 86, 1983.
-
(1983)
Proc. Symp. VLSI Tech.
, pp. 86
-
-
Kato, T.1
Ito, T.2
Taguchi, M.3
Nakamura, T.4
Ishikawa, H.5
-
12
-
-
0017006097
-
Film substrate interaction in Si/Ta and Si/Ta2 O5structures
-
fi. 1405
-
A. G. Revesz and T. D. Kirkendall, “Film substrate interaction in Si/Ta and Si/Ta2 O5structures,” J. Electrochem. Soc., vol. 123, fi. 1405, 1976.
-
(1976)
J. Electrochem. Soc.
, vol.123
-
-
Revesz, A.G.1
Kirkendall, T.D.2
-
13
-
-
0023293799
-
Dielectric characteristics of double-layer structure of extremely thin Ta2O5/SiO2 on Si
-
Y. Nishioka, S. Kimura, H. Shinriki, and K. Mukai, “Dielectric characteristics of double-layer structure of extremely thin Ta2O5/SiO2 on Si,” J. Electrochem. Soc., vol. 134, p. 410, 1987.
-
(1987)
J. Electrochem. Soc.
, vol.134
, pp. 410
-
-
Nishioka, Y.1
Kimura, S.2
Shinriki, H.3
Mukai, K.4
-
14
-
-
0020829837
-
A 4.5 ns access time 4 × 4 bit ECL RAM
-
T. Tamura, M- Nakamae, H. Shiraki, T. Ishikawa, T. Akashi, H. Mayumi, T. Kubota, and T. Nakamura, “A 4.5 ns access time 4 × 4 bit ECL RAM,” IEEE J. Solid-State Circuits, vol. SC-18, p. 515, 1983.
-
(1983)
IEEE J. Solid-State Circuits
, vol.SC-18
, pp. 515
-
-
Tamura, T.1
Nakamae, M.2
Shiraki, H.3
Ishikawa, T.4
Akashi, T.5
Mayumi, H.6
Kubota, T.7
Nakamura, T.8
-
15
-
-
84939755050
-
A 3.5 ns, 2 W, 20 mm2 16 kb ECL bipolar RAM
-
K. Yamaguchi, H. Nanbu, K. Kanetani, N. Homma, Y. Nishioka, A. Uchida, and K. Ogiue, “A 3.5 ns, 2 W, 20 mm2 16 kb ECL bipolar RAM,” in IEEE Int. Solid-State Circuit Conf Tech. Papers, p. 214, 1986.
-
(1986)
IEEE Int. Solid-State Circuit Conf Tech. Papers
, pp. 214
-
-
Yamaguchi, K.1
Nanbu, H.2
Kanetani, K.3
Homma, N.4
Nishioka, Y.5
Uchida, A.6
Ogiue, K.7
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