Placement by Simulated Annealing on a Multiprocessor

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 6, Issue 4, 1987, Pages 534-549

  Kravitz, Saul A ^a   Rutenbar, Rob A ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS, DIGITAL - MULTIPROCESSING; INTEGRATED CIRCUITS - LAYOUT; MATHEMATICAL TECHNIQUES - ALGORITHMS;

SIMULATED ANNEALING ALGORITHM;

INTEGRATED CIRCUITS, VLSI;

EID: 0023383256     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/TCAD.1987.1270301     Document Type: Article

References (17)

1. E. H. L. Aarts and P. J. M. van Laarhoven, “Statistical cooling: A general approach to combinatorial optimization problems,” Philips J. Res., vol. 40, no. 4, pp. 193–226, 1985.
2. J. M. Arnold and C. J. Terman, “A multiprocessor implementation of a logic level simulator,” in Proc. ICCAD, Nov. 1985, pp. 116–118.
3. R. V. Baron, R. F. Rashid, E. H. Siegel, A. Tevanian, and M. W. Young, “MACH-1: An operating system environment for large-scale multiprocessor applications,” IEEE Software, July 1985.
4. D. Chyan and M. Breuer, “A placement algorithm for array processors,” in Proc. Design Automation Conf., 1983, 182–188.
5. J. W. Greene and K. J. Supowit, “Simulated annealing without rejected moves,” IEEE Trans. Computer-Aided Design, vol. CAD-5, no. 1, pp. 221–228, Jan. 1986.
6. A. Iosupovici, C. King, and M. Breuer, “A module interchange placement machine,” in Proc. Design Automation Conf., 1983.
7. S. A. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, “Optimization by simulated annealing,” Science, vol. 220, no. 4598, pp. 671–680, May 1983.
8. H. W. Leong, D. F. Wong, and C. L. Liu, “A simulated-annealing channel router,” in Proc. ICCAD, Nov. 1985, pp. 226–228.
9. D. Mitra, F. Romeo, and A. Sangiovanni-Vincentelli, “Convergence and finite-time behavior of simulated-annealing,” in Proc. 24th Conf. Decision and Control, Dec. 1985, pp. 761–767.
10. T. P. Moore and A. J. DeGeus, “Simulated annealing controlled by a rule based expert system,” in Proc. ICCAD, Nov. 1985.
11. J. Petersen and A. Silberschatz, Operating Systems Concepts. Reading, MA: Addison-Wesley, 1984.
12. R. Rashid, Accent Kernel Reference Manual, Dept. Computer Science, Carnegie Mellon Univ., Pittsburgh, PA, 1984.
13. C. Sechen, The Timberwolf Standard Cell Placement Program, User's Guide for Version 1.0, Dept. EECS, Univ. of California, Berkeley, 1984.
14. C. Sechen and A. Sangiovanni Vincentelli, “The Timberwolf placement and routing package,” in Proc. 1984 Custom IC Conf., May 1984.
15. C. Sechen and A. Sangiovanni Vincentelli, “The Timberwolf placement and routing package,” IEEE J. Solid-State Circuits, vol. SC-20, no. 2, pp. 510–522, Apr. 1985.
16. R. Smith, “Accelerator plans for iterative improvement placement,” presented at IEEE Physical Design Workshop, Mar. 1985.
17. P. Spira and C. Hage, “Hardware acceleration of gate array layout,” in Proc. Design Automation Conf., June 1985.