Static and Transient Lat-chup Simulation of VLSI-CMOS with an Improved Physical Design Model

IEEE Transactions on Electron Devices

Volumn 34, Issue 6, 1987, Pages 1290-1296

  Strzempa DeprÉ, Michael ^a   Harter, Johann ^b   Werner, Christoph ^b   Skapa, Helmut ^b   Kassing, Rainer ^a  

^a UNIVERSITY OF KASSEL   (Germany)

^b SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTOR DEVICES, MOS - MATHEMATICAL MODELS;

LATCHUP SIMULATION; STATIC/TRANSIENT LATCHUP;

INTEGRATED CIRCUITS, VLSI;

EID: 0023363467     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1987.23083     Document Type: Article

References (16)

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