Transition fault simulation

IEEE Design and Test of Computers

Volumn 4, Issue 2, 1987, Pages 32-38

  Waicukauski, John A ^a   Lindbloom, Eric ^a   Rosen, Barry K ^a   Iyengar, Vijay S ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARK DESIGNS; DELAY FAULT MODEL; STUCK FAULTS; STUCK SIMULATOR ADD-ONS; TRANSITION FAULT SIMULATION;

SEMICONDUCTOR DEVICES, MOS - COMPUTER SIMULATION;

INTEGRATED CIRCUITS, VLSI;

EID: 0023330236     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.1987.295104     Document Type: Article

References (17)

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