Cmos Logic Cell Switching Speed Thermal Characterisation

Electronics Letters

Volumn 23, Issue 9, 1987, Pages 458-460

  Shoucair, F S ^a  

^a YALE UNIVERSITY   (United States)

Author keywords

Logic and logic design; Switching

Indexed keywords

INTEGRATED CIRCUITS; LOGIC CIRCUITS, NAND;

CMOS LOGIC CELL; GATE DELAY; NAND GATES; SPICE2G. 6 SIMULATIONS; SWITCHING SPEED;

LOGIC CIRCUITS;

EID: 0023328722     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19870331     Document Type: Article

References (7)

1. PRINCE, J. L., DRAPER, B. L., RAPP., E. A., KRONBERG, J. N., and FITCH, l. t.: IEEE Trans., 1980, CHMT-3, pp. 571-579
2. draper, b. l., and palmer, d. w.: ‘Extension of high-temperature electronics’, CHMT-3., 1979, CHMT-2, pp. 399-404
3. palkuti, L. J., prince, J. l., and glista, A. S.: CHMT-3., 1979, CHMT-2, pp. 405-12
4. shoucair, f. s., and early, j. m.: CHMT-3., 1984, ED-31, pp. 1866-1872
5. shoucair, f. s.: CHMT-3., 1986, CHMT-9, pp. 242-251
6. elmasry, m. i.: (IEEE Press, 1981), pp. 4-27
7. burns, j. r.: RCA Rev., 1964, pp. 627-661