HPEX: A HIERARCHICAL PARASITIC CIRCUIT EXTRACTOR.

Proceedings - Design Automation Conference

Volumn , Issue , 1987, Pages 566-569

  Su, Shun Lin ^a   Rao, Vasant B ^a   Trick, Timothy N ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING - ALGORITHMS; DATA PROCESSING - DATA STRUCTURES; LOGIC CIRCUITS - COMPUTER AIDED DESIGN;

GEOMETRICAL PREPROCESSING ALGORITHM; HIERARCHICAL PARASITIC CIRCUIT EXTRACTOR; LAYOUT VERIFICATION; MANHATTAN LAYOUTS; Y-X SCANLINE METHOD;

INTEGRATED CIRCUITS;

EID: 0023251695     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/37888.37975     Document Type: Conference Paper

References (12)