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Volumn , Issue , 1987, Pages 56-59
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STANDARD CELL PLACEMENT USING SIMULATED SINTERING.
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Author keywords
[No Author keywords available]
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Indexed keywords
INTEGRATED CIRCUITS, VLSI - COMPUTER AIDED DESIGN;
LTX2 CHIP LAYOUT SYSTEM;
SIMULATED SINTERING;
STANDARD CELL PLACEMENT;
LOGIC CIRCUITS;
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EID: 0023250022
PISSN: 01467123
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/37888.37896 Document Type: Conference Paper |
Times cited : (21)
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References (10)
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