THREE-VALUED CMOS ARITHMETIC LOGIC UNIT CHIP.

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 1987, Pages 215-220

  Diawuo, Kwasi ^a   Mouftah, H T ^a  

^a QUEEN S UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER METATHEORY - MANY VALUED LOGICS; SEMICONDUCTOR DEVICES, MOS;

COMPLEMENTARY MOS (CMOS); SYMMETRIC TERNARY REPRESENTATION OF INTEGERS; TERNARY ARITHMETIC LOGIC UNIT (TALU) CHIP; TERNARY INVERTER;

LOGIC CIRCUITS;

EID: 0023246066     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)