HIERARCHICAL APPROACH TO TEST VECTOR GENERATION.

Proceedings - Design Automation Conference

Volumn , Issue , 1987, Pages 495-501

  Chandra, Susheel J ^a   Patel, Janak ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS - AUTOMATIC TESTING;

AUTOMATIC TEST VECTOR GENERATION; HIERARCHICAL APPROACH; HIPODEM; STUCK-AT FAULT;

LOGIC CIRCUITS, COMBINATORIAL;

EID: 0023174416     PISSN: 01467123     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)